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General-purpose computing...
Forum: New Releases
Last Post: laubzega
2021-09-13, 08:07 AM
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GEOS
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Last Post: ytm
2021-09-04, 07:02 PM
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DL1 and DL2 - documentati...
Forum: Programming
Last Post: silverdr
2021-06-05, 05:13 PM
» Replies: 1
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Integrated Lumafix Pro
Forum: General
Last Post: silverdr
2021-05-14, 04:57 PM
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Kernal64 1.7.0 b15
Forum: Emulation
Last Post: silverdr
2021-04-20, 08:58 AM
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VIC-2 FPGA Replacement - ...
Forum: General
Last Post: laubzega
2021-02-18, 07:01 AM
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C128 Compatible?
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Last Post: laubzega
2021-01-08, 09:51 PM
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Expected rendering?
Forum: General
Last Post: silverdr
2020-11-03, 12:01 PM
» Replies: 1
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Kernal64 emulator with Be...
Forum: Emulation
Last Post: silverdr
2020-10-21, 05:20 PM
» Replies: 3
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New BeamRacer batch arriv...
Forum: News & Announcements
Last Post: silverdr
2020-10-20, 03:07 PM
» Replies: 0
» Views: 1,659

 
  General-purpose computing with VASYL
Posted by: ytm - 2021-09-04, 06:16 PM - Forum: New Releases - Replies (7)

I will go back to GEOS stuff soon, but last week I was occupied by a question: can you write and run any program using VASYL instruction set? Can I have a shader that will process bitmap for PBS?

In other words - is VASYL's instruction set Turing complete?

After a week I already know the answer: big fat YES and I have a proof for this: https://github.com/ytmytm/c64-beamracer-subleq

SUBLEQ is an esoteric (meaning: real, working, just not very practical) computer architecture that has only one instruction: SUBLEQ.

The only possible instruction for such CPU is "SUBtract and branch if Less-than or EQual to zero".


Code:
Mem[b] = Mem[b]-Mem[a]
if (Mem[b]<=0) then goto c

It turns out that this is all you need for general-purpose computing and it was proven that SUBLEQ is Turing complete. In fact, there are even more of these One-Instruction Set Computer architectures.

SUBLEQ seemed feasible for me to try with VASYL: we only have DECA/B and BRA for arithmetic and conditional jumps, but having two independent memory ports with configurable step after every read/write was very promising. Especially since the step can go both ways - positive and negative.

The Display List Virtual Machine goes through SUBLEQ instruction - four word-sized pointers and updates itself using both memory ports:
  • to setup loads into VREG_ADR0/1 when data is read/written or when we need to set starting point of a lookup table
  • to setup loads into VREG_STEP0/1 when we traverse lookup table to add numbers, negate them or read the sign
  • to load into VREG_ADR0 the address of the next instruction
Lookup tables are very easy: setup VREG_ADR and STEP and make two memory reads.

Arithmetic was a bit tricky. We need to know the result of b-a when we have a and b. So we use one lookup table to transform value a into -a and then second lookup table to find the result of 0+b+(-a).

Much bigger obstacle was the program counter implementation. First I wanted to use PORT0 exclusively for that, but it's not possible - there is no temporary register and I need both memory ports for lookups (read from PORT0, write into PORT1).
But how to preserve PORT0? We can't - there is no way to read anything from the registers. We can only read from memory.

The solution was to extend SUBLEQ programs to be fully linked with explicit addresses of targets for jump when result is negative or zero and also for the positive branch. Any examples for SUBLEQ that you can find in the Internet will have the positive jump pointing implicitly to the next instruction.

The VASYL SUBLEQ VM can process about 214 SUBLEQ instructions per frame, so the virtual SUBLEQ CPU runs at about 10.7kHz.

Almost whole bank 0 is available for program and data - about 62.5KB.

I'm not an experienced SUBLEQ programmer and all I have right now is a debug program that does simple calculations and modifies a value stored into $d020 while the VM is running.

To conclude: yes, I have proven that VASYL ISA is Turing complete and you can port any program to it, at least indirectly through SUBLEQ.

This just opens the gate for flood of software running natively on VASYL: quasi-assembly language, Forth, shaders and even BrainFuck Smile

Thank you guys for VBASIC, without VLIST and VPEEK it would be very hard to debug this.

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  DL1 and DL2 - documentation not clear on a few things
Posted by: silverdr - 2021-06-05, 12:17 PM - Forum: Programming - Replies (1)

ytm Wrote:I have a few questions - the documentation is not clear/explicit on those:

1. If I start the second displaylist (VREG_DL2STROBE) what happens at the end of the frame? Do we get back to the beginning of DL1 or the beginning of DL2? If DL2 - how do I get back to DL1?

I admit this might not be completely clear so I'll update the docs shortly.

OTOH it is quite easy to verify with a few lines of VBASIC:

Code:
10 RACER0:RACER2
100 VCFG 0,0,1
110 VWAIT 130,0
120 VMOV $20,0:VMOV$21,0
130 VDELAYV 10
140 VMOV$20,14:VMOV$21,6
150 VMOV$41,0:VMOV$42,1:REM DL2 $0100
160 VMOV$43,0:REM DL2STROBE
170 REM VEND NOT NEEDED HERE
200 VCFG 0,$100,1
210 VWAIT 150,0
220 VMOV $20,0:VMOV$21,0
230 VDELAYV 10
240 VMOV$20,14:VMOV$21,6
999 VEND
1000 DLON
1999 END
READY.
If we'd be returning to DL2, then we would have only one black bar stable on the screen. Since there are two - this means we get back to DL1 ;-) Every raster (frame) we first execute the part located at $0000 and then the part located at $0100. This allows adding extra blocks of VASYL code and "jumping" around them without a need to cache/save/restore the initial address. If we look at it this way, then the DL2 is a kind of JMP equivalent (in addition to existing BRA) rather than a separate DL entity. There is a small caveat, which we have to be aware of, if we jump across memory banks. I'll cover it answering the next question.

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  GEOS
Posted by: ytm - 2021-05-25, 08:21 PM - Forum: New Releases - Replies (7)

Hi

Encouraged by silverdr I started development of BeamRacer-compatible GEOS.

You can find it here on GitHub: https://github.com/ytmytm/geos/tree/beamracer-ramexp (make sure to checkout breamracer-ramexp branch).

Right now there is support for the same basic additional features that already existed in this reverse engineered GEOS back in 2000 for expansions like +60K and RamCart 64/128

  • whole DeskTop will be cached in RAM, so you only need to keep it on the boot disk
  • swap file for memory overwritten by running Desk Accessories (Calculator, Notepad, etc.) is stored in extra RAM rather than on the disk
This occupies most of the first 64K, so there are 7 banks left.

I plan to use 6x64K banks for disk cache / RAM disk.

The last bank would be reserved for the most ambitious project - redirecting all graphical functions of GEOS to BeamRacer, basically overlaying whole screen with Bitmap Sequencer data. This would allow to use step/repeat/copy features for fast access. VDC (80 column) support on C128 proves that this is possible to do and GEOS isolates applications from accessing bitmaps directly.

You can find whole roadmap here: https://github.com/ytmytm/geos/projects/1

There are no releases yet, but I have setup automated build already. If you go into Actions, then click on the latest CI workflow run, then in the Artifacts section you will find the PRG file that you can load and run. A disk with DeskTop must be in the drive 8.

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  Integrated Lumafix Pro
Posted by: sebos - 2021-05-13, 02:34 PM - Forum: General - Replies (3)

Hello.

I am thinking about this specification. When connected to the BemRacer, there is absolutely no improvement in image quality.
The image is identical to that of the VIC-II itself.

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  Kernal64 1.7.0 b15
Posted by: silverdr - 2021-03-15, 11:35 PM - Forum: Emulation - Replies (2)

@abbruzze - noticed a small problem with the version mentioned in the subject. When using VBASIC and issuing the recommended "reset to a known state" sequence `RACER 0:RACER 2` - it looks like the displaylist gets enabled. That is not correct and leads to various problems especially when the already existing displaylist works with PORT registers... Please ensure that the above mentioned sequence completely re-sets the emulated BeamRacer, which includes disabling displaylist processing.

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  VIC-2 FPGA Replacement - Randy Rossi
Posted by: Balartacus - 2021-02-09, 04:48 AM - Forum: General - Replies (2)

Greetings,

A guy named Randy Rossi is working on a VIC-2 FPGA replacement. It would be very cool to see this new VIC-2 development be compatible with the BeamRacer.

Here is his YT channel: https://www.youtube.com/channel/UCx2-Yj0...8y09ywPjMw

Latest Video: https://www.youtube.com/watch?v=LY0Hu4egKYc&t=1245s

Hope you are doing well, and thank you again for all of your hard work on the BeamRacer!

Cheers!  Big Grin

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  C128 Compatible?
Posted by: CountZero - 2021-01-08, 04:00 PM - Forum: General - Replies (1)

Will this work in a C128?

More specifically, in C64 mode on a C128?  Although it would be pretty cool to also have it available in C128 40 column mode.

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  Expected rendering?
Posted by: shazz - 2020-11-01, 11:09 PM - Forum: General - Replies (1)

[quote pid='110' dateline='1604272188']
Hi!

After testing the examples using Kernal64, I noticed a big difference when running the sequencer example.
Of course, Kernal64 doesn't try to mimic my old monitor (Sony PVM-14N5U monitor, PAL/NTSC) but I found the vertical lines quite weird (check the M and H, and the BASIC lines), like some kind of interlaced display.
I never noticed that with "normal" C64 graphics. I check a few demos, nothing like that. Do I imagine things ?

[Image: seq.jpg]

Monitor specs: https://www.broadcaststore.com/pdf/model.../17906.pdf
[/quote]

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  New BeamRacer batch arrived!
Posted by: silverdr - 2020-10-20, 03:07 PM - Forum: News & Announcements - No Replies

Next batch of BeamRacer boards was cleared through customs and arrived today. We still need to thoroughly test every single board but we expect to start notifying everyone who reserved his unit really soon now  Big Grin

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  Kernal64 emulator with BeamRacer / 3
Posted by: abbruzze - 2020-10-12, 10:12 AM - Forum: Emulation - Replies (3)

Update, new demos.

reflections:
[Image: reflections.gif]

hirestext:
[Image: hirestext.gif]

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